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Job Description:

Responsible for server platform performance test & optimization;

Test cases development and optimization;

Test execution and reporting, isolation;

Test document/guide development.

Qualification:

Bachelor degree or above in Computer Science, Software Engineering, or Electronic Engineering;

5+ years of experience in server software/hardware testing;

Experience in both Linux and Windows server environments;

At least familiar with one I/O test software;

Familiar with x86 architecture;

Familiar with virtualization technology;

Familiar with KVM/VMware;

Good experience in test database/middle ware is a plus;

Good experience in test automation is a plus;

Good sense of responsibility, flexibility and teamwork;

Quick self-learning capability is a must.


HR Contact:

Job Description:

Participate ASIC digital verification for various IP/SoC projects;

Create verification plans with designers;

Develop DV architecture and verification environment;

Conduct verification execution and sign-off.

Qualification:

Excellent team working style;

Solid IP/SoC verification background;

Mass production experience for verified IP/SoC;

Bachelor with 2+ years of working experience in ASIC digital verification;

Production experiences in verification strategies and test plans;

Familiar with System Verilog/UVM for test bench creation, debug, reuse, constrained-random stimulus and functional coverage;

Production experience in ARM buses, such as AXI/AMBA/APB is a plus;

Familiar with verification tools;

Familiar with Linux, Csh/Python or any script languages;

Good English skills (both read and write).


HR Contact:

Job Description:

Write micro-architecture definition/IC design spec;

Write RTL coding for block or top level;

Do IP level synthesis/timing analysis/formality check/CDC check/Code coverage check;

Assist verification engineer to complete module and top level simulation and verification;

Debug RTL/Gate Level waveform at module or top level;

Do Silicon debugging of the related module functionalities and provide ECO solution accordingly.

Qualification:

MSEE with 2+ years of experience in digital design;

Strong skills of Verilog RTL coding, simulation debug and base or metal layer ECO;

Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys VCS, DC, PT, etc.;

Basic skills of Script and be familiar with TCL, Perl, etc.;

Self-motivated, good team work spirit and good communication skills;

At least 3+ years of experience in one of the following field:

Experience in CPU/GPU/DSP/image processing design;Experience in AXI/AHB/APB protocols and ARM-based fabric design;Experience in DDR controller design or integration of DDR controller and PHY in large SoC;Experience in PCIe controller design or integration of PCIe controller and PHY in large SoC;Experience in using System Verilog, UVM to do verification.
HR Contact:

Job Description:

Work with technical marketing to define SoC product for CPU/AI/computer system;

Write the SoC architecture and requirement specs;

Do high level modeling and simulations;

Work with project lead to conduct feasibility analysis, define design strategy and planning;

Keep up to date with latest SoC for CPU/AI/computer system.

Qualification:

Master or Ph.D degree with 5+ years of experience in SoC architecture design;

Proven track record of SoC architecture definition and product design;

Familiar with RISC architecture, on chip bus protocols, memory and coherency;

Familiar with SoC I/O interface controller/PHY such as DDR/PCIe/USB/AV interfaces;

Solid background in CPU architectures and operations with specialty in memory/cache control and management;

Familiar with System Verilog and/or System C;

Positive mindset, self-driven and good team player;

Excellent written and oral communication skills in both Chinese and English.


HR Contact:

Job Description:

Help IC architecture and micro-architecture design;

Responsible for specification and RTL coding for the given block;

Work with DV team to define the test plan and verify the RTL thoroughly;

Work with SoC team to guarantee successful integration;

Synthesize the design and provide timing constraints to the physical design team to ensure RTL meets timing.

Qualification:

Master or Ph.D degree with 10+ years of experience in SoC architecture design;

Proven track record of SoC architecture definition and product design;

Familiar with RISC architecture, on chip bus protocols, memory and coherency;

Familiar with SoC I/O interface controller/PHY such as DDR/PCIe/USB/AV interfaces;

Solid background in CPU architectures and operations with specialty in memory/cache control and management;

Familiar with System Verilog and/or System C;

Positive mindset, self-driven and good team player;

Excellent written and oral communication skills in both Chinese and English.


HR Contact:

Job Description:

Own MRD, responsible for product solution offerings, promotion, design win, account acquisition and business growth;

Understand customer requirements, leading product portfolio, strategy, direction and define products for new market opportunities;

Responsible for product competitiveness, new technology trend and roadmap;

Provide product communication and collaboration internally and externally;

Drive end-to-end execution from concept, plan to launch.

Qualification:

Bachelor or master degree in EE, Computer Science or other similar major;

Preferred 8+ years of experiencce in IT industry with strong technical background;

Preferred direct experience in R&D and Product Marketing in Server market.

Proven track record on creating enterprise products;

A team player and work well in a team environment;

Excellent written and presentation skill;

Having business sense and logical thinking;

Ability to work well under pressure.


HR Contact:

Job Description:

Add new hardware virtualization features support to various hypervisors, containers, and other framework;

Support operating system vendors to ensure virtualization readiness in their OS and hypervisor releases;

Develop new usage models built on virtualization/container technologies.

Qualification:

BS/MS in Computer Science, Computer Engineering or equivalent, with 4/3 years of relevant software development experience;

In-depth understanding of x86 architecture, especially in virtualization features;

In-depth understanding of OS theory and implementation, Linux is preferred;

Proficient in the C or GO programming language.

Hands-on knowledge and experience with virtualization and container technologies and their open source implementation will be a plus;

Experience in working with cross-geo communities and customers will be desirable.


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